[][src]Module core::arch::arm

🔬 This is a nightly-only experimental API. (stdsimd #27731)
This is supported on ARM only.

Platform-specific intrinsics for the arm platform.

See the module documentation for more details.

Structs

float32x2_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide vector of two packed f32.

float32x4_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of four packed f32.

int16x2_t [
Experimental
] [
ARM
]

ARM-specific 32-bit wide vector of two packed i16.

int16x4_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide vector of four packed i16.

int16x8_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of eight packed i16.

int32x2_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide vector of two packed i32.

int32x4_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of four packed i32.

int64x1_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide vector of one packed i64.

int64x2_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of two packed i64.

int8x4_t [
Experimental
] [
ARM
]

ARM-specific 32-bit wide vector of four packed i8.

int8x8_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide vector of eight packed i8.

int8x16_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of sixteen packed i8.

int8x8x2_t [
Experimental
] [
ARM
]

ARM-specific type containing two int8x8_t vectors.

int8x8x3_t [
Experimental
] [
ARM
]

ARM-specific type containing three int8x8_t vectors.

int8x8x4_t [
Experimental
] [
ARM
]

ARM-specific type containing four int8x8_t vectors.

poly16x4_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide vector of four packed u16.

poly16x8_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of eight packed u16.

poly8x8_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide polynomial vector of eight packed u8.

poly8x16_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of sixteen packed u8.

poly8x8x2_t [
Experimental
] [
ARM
]

ARM-specific type containing two poly8x8_t vectors.

poly8x8x3_t [
Experimental
] [
ARM
]

ARM-specific type containing three poly8x8_t vectors.

poly8x8x4_t [
Experimental
] [
ARM
]

ARM-specific type containing four poly8x8_t vectors.

uint16x2_t [
Experimental
] [
ARM
]

ARM-specific 32-bit wide vector of two packed u16.

uint16x4_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide vector of four packed u16.

uint16x8_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of eight packed u16.

uint32x2_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide vector of two packed u32.

uint32x4_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of four packed u32.

uint64x1_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide vector of one packed u64.

uint64x2_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of two packed u64.

uint8x4_t [
Experimental
] [
ARM
]

ARM-specific 32-bit wide vector of four packed u8.

uint8x8_t [
Experimental
] [
ARM
]

ARM-specific 64-bit wide vector of eight packed u8.

uint8x16_t [
Experimental
] [
ARM
]

ARM-specific 128-bit wide vector of sixteen packed u8.

uint8x8x2_t [
Experimental
] [
ARM
]

ARM-specific type containing two uint8x8_t vectors.

uint8x8x3_t [
Experimental
] [
ARM
]

ARM-specific type containing three uint8x8_t vectors.

uint8x8x4_t [
Experimental
] [
ARM
]

ARM-specific type containing four uint8x8_t vectors.

Functions

__DMB [
Experimental
] [
ARM and mclass
]

Data Memory Barrier

__DSB [
Experimental
] [
ARM and mclass
]

Data Synchronization Barrier

__ISB [
Experimental
] [
ARM and mclass
]

Instruction Synchronization Barrier

__NOP [
Experimental
] [
ARM and mclass
]

No Operation

__SEV [
Experimental
] [
ARM and mclass
]

Send Event

__WFE [
Experimental
] [
ARM and mclass
]

Wait For Event

__WFI [
Experimental
] [
ARM and mclass
]

Wait For Interrupt

__disable_fault_irq [
Experimental
] [
ARM and mclass
]

Disable FIQ

__disable_irq [
Experimental
] [
ARM and mclass
]

Disable IRQ Interrupts

__enable_fault_irq [
Experimental
] [
ARM and mclass
]

Enable FIQ

__enable_irq [
Experimental
] [
ARM and mclass
]

Enable IRQ Interrupts

__get_APSR [
Experimental
] [
ARM and mclass
]

Get APSR Register

__get_BASEPRI [
Experimental
] [
ARM and mclass
]

Get Base Priority

__get_CONTROL [
Experimental
] [
ARM and mclass
]

Get Control Register

__get_FAULTMASK [
Experimental
] [
ARM and mclass
]

Get Fault Mask

__get_IPSR [
Experimental
] [
ARM and mclass
]

Get IPSR Register

__get_MSP [
Experimental
] [
ARM and mclass
]

Get Main Stack Pointer

__get_PRIMASK [
Experimental
] [
ARM and mclass
]

Get Priority Mask

__get_PSP [
Experimental
] [
ARM and mclass
]

Get Process Stack Pointer

__get_xPSR [
Experimental
] [
ARM and mclass
]

Get xPSR Register

__set_BASEPRI [
Experimental
] [
ARM and mclass
]

Set Base Priority

__set_BASEPRI_MAX [
Experimental
] [
ARM and mclass
]

Set Base Priority with condition

__set_CONTROL [
Experimental
] [
ARM and mclass
]

Set Control Register

__set_FAULTMASK [
Experimental
] [
ARM and mclass
]

Set Fault Mask

__set_MSP [
Experimental
] [
ARM and mclass
]

Set Main Stack Pointer

__set_PRIMASK [
Experimental
] [
ARM and mclass
]

Set Priority Mask

__set_PSP [
Experimental
] [
ARM and mclass
]

Set Process Stack Pointer

_rev_u16 [
Experimental
] [
ARM
]

Reverse the order of the bytes.

_rev_u32 [
Experimental
] [
ARM
]

Reverse the order of the bytes.

qadd [
Experimental
] [
ARM
]

Signed saturating addition

qadd8 [
Experimental
] [
ARM
]

Saturating four 8-bit integer additions

qadd16 [
Experimental
] [
ARM
]

Saturating two 16-bit integer additions

qasx [
Experimental
] [
ARM
]

Returns the 16-bit signed saturated equivalent of

qsax [
Experimental
] [
ARM
]

Returns the 16-bit signed saturated equivalent of

qsub [
Experimental
] [
ARM
]

Signed saturating subtraction

qsub8 [
Experimental
] [
ARM
]

Saturating two 8-bit integer subtraction

qsub16 [
Experimental
] [
ARM
]

Saturating two 16-bit integer subtraction

sadd8 [
Experimental
] [
ARM
]

Returns the 8-bit signed saturated equivalent of

sadd16 [
Experimental
] [
ARM
]

Returns the 16-bit signed saturated equivalent of

sasx [
Experimental
] [
ARM
]

Returns the 16-bit signed equivalent of

sel [
Experimental
] [
ARM
]

Select bytes from each operand according to APSR GE flags

shadd8 [
Experimental
] [
ARM
]

Signed halving parallel byte-wise addition.

shadd16 [
Experimental
] [
ARM
]

Signed halving parallel halfword-wise addition.

shsub8 [
Experimental
] [
ARM
]

Signed halving parallel byte-wise subtraction.

shsub16 [
Experimental
] [
ARM
]

Signed halving parallel halfword-wise subtraction.

smlad [
Experimental
] [
ARM
]

Dual 16-bit Signed Multiply with Addition of products and 32-bit accumulation.

smlsd [
Experimental
] [
ARM
]

Dual 16-bit Signed Multiply with Subtraction of products and 32-bit accumulation and overflow detection.

smuad [
Experimental
] [
ARM
]

Signed Dual Multiply Add.

smuadx [
Experimental
] [
ARM
]

Signed Dual Multiply Add Reversed.

smusd [
Experimental
] [
ARM
]

Signed Dual Multiply Subtract.

smusdx [
Experimental
] [
ARM
]

Signed Dual Multiply Subtract Reversed.

usad8 [
Experimental
] [
ARM
]

Sum of 8-bit absolute differences.

usad8a [
Experimental
] [
ARM
]

Sum of 8-bit absolute differences and constant.

vadd_f32 [
Experimental
] [
ARM and neon
]

Vector add.

vadd_s8 [
Experimental
] [
ARM and neon
]

Vector add.

vadd_s16 [
Experimental
] [
ARM and neon
]

Vector add.

vadd_s32 [
Experimental
] [
ARM and neon
]

Vector add.

vadd_u8 [
Experimental
] [
ARM and neon
]

Vector add.

vadd_u16 [
Experimental
] [
ARM and neon
]

Vector add.

vadd_u32 [
Experimental
] [
ARM and neon
]

Vector add.

vaddl_s8 [
Experimental
] [
ARM and neon
]

Vector long add.

vaddl_s16 [
Experimental
] [
ARM and neon
]

Vector long add.

vaddl_s32 [
Experimental
] [
ARM and neon
]

Vector long add.

vaddl_u8 [
Experimental
] [
ARM and neon
]

Vector long add.

vaddl_u16 [
Experimental
] [
ARM and neon
]

Vector long add.

vaddl_u32 [
Experimental
] [
ARM and neon
]

Vector long add.

vaddq_f32 [
Experimental
] [
ARM and neon
]

Vector add.

vaddq_s8 [
Experimental
] [
ARM and neon
]

Vector add.

vaddq_s16 [
Experimental
] [
ARM and neon
]

Vector add.

vaddq_s32 [
Experimental
] [
ARM and neon
]

Vector add.

vaddq_s64 [
Experimental
] [
ARM and neon
]

Vector add.

vaddq_u8 [
Experimental
] [
ARM and neon
]

Vector add.

vaddq_u16 [
Experimental
] [
ARM and neon
]

Vector add.

vaddq_u32 [
Experimental
] [
ARM and neon
]

Vector add.

vaddq_u64 [
Experimental
] [
ARM and neon
]

Vector add.

vmovl_s8 [
Experimental
] [
ARM and neon
]

Vector long move.

vmovl_s16 [
Experimental
] [
ARM and neon
]

Vector long move.

vmovl_s32 [
Experimental
] [
ARM and neon
]

Vector long move.

vmovl_u8 [
Experimental
] [
ARM and neon
]

Vector long move.

vmovl_u16 [
Experimental
] [
ARM and neon
]

Vector long move.

vmovl_u32 [
Experimental
] [
ARM and neon
]

Vector long move.

vmovn_s16 [
Experimental
] [
ARM and neon
]

Vector narrow integer.

vmovn_s32 [
Experimental
] [
ARM and neon
]

Vector narrow integer.

vmovn_s64 [
Experimental
] [
ARM and neon
]

Vector narrow integer.

vmovn_u16 [
Experimental
] [
ARM and neon
]

Vector narrow integer.

vmovn_u32 [
Experimental
] [
ARM and neon
]

Vector narrow integer.

vmovn_u64 [
Experimental
] [
ARM and neon
]

Vector narrow integer.

vpmax_f32 [
Experimental
] [
ARM and neon
]

Folding maximum of adjacent pairs

vpmax_s8 [
Experimental
] [
ARM and neon
]

Folding maximum of adjacent pairs

vpmax_s16 [
Experimental
] [
ARM and neon
]

Folding maximum of adjacent pairs

vpmax_s32 [
Experimental
] [
ARM and neon
]

Folding maximum of adjacent pairs

vpmax_u8 [
Experimental
] [
ARM and neon
]

Folding maximum of adjacent pairs

vpmax_u16 [
Experimental
] [
ARM and neon
]

Folding maximum of adjacent pairs

vpmax_u32 [
Experimental
] [
ARM and neon
]

Folding maximum of adjacent pairs

vpmin_f32 [
Experimental
] [
ARM and neon
]

Folding minimum of adjacent pairs

vpmin_s8 [
Experimental
] [
ARM and neon
]

Folding minimum of adjacent pairs

vpmin_s16 [
Experimental
] [
ARM and neon
]

Folding minimum of adjacent pairs

vpmin_s32 [
Experimental
] [
ARM and neon
]

Folding minimum of adjacent pairs

vpmin_u8 [
Experimental
] [
ARM and neon
]

Folding minimum of adjacent pairs

vpmin_u16 [
Experimental
] [
ARM and neon
]

Folding minimum of adjacent pairs

vpmin_u32 [
Experimental
] [
ARM and neon
]

Folding minimum of adjacent pairs

vrsqrte_f32 [
Experimental
] [
ARM and neon
]

Reciprocal square-root estimate.